Title :
On chip ESD protection of 600V voltage node
Author :
Vashchenko, Vladislav A. ; Gallerano, Antonio ; Shibkov, Andrei
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
This study presents for the first time ESD protection solutions in integrated silicon process technologies for the voltage range up to 600V. The ESD protection clamp is implemented using a NLDMOS-SCR type ESD device architecture. The study presents both reversible triggering I-V characteristics suitable for package level ESD protection as well as dependence of the ESD device characteristics upon the structure parameters and the state of a control electrode.
Keywords :
MOS integrated circuits; electrostatic discharge; elemental semiconductors; power integrated circuits; silicon; NLDMOS-SCR type ESD device architecture; Si; integrated silicon process technologies; on chip ESD protection clamp; reversible triggering I-V characteristics; structure parameters; voltage 600 V; Electrostatic discharge; Integrated circuit modeling; Junctions; Layout; Logic gates; Semiconductor process modeling; Transient analysis;
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2011 IEEE 23rd International Symposium on
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-8425-6
DOI :
10.1109/ISPSD.2011.5890807
