• DocumentCode
    1692883
  • Title

    Characterization of coined solder bumps on PCB pads

  • Author

    Nah, Jae-Woong ; Paik, Kyung W. ; Kim, Won-Hoe ; Hur, Ki-Rok

  • Author_Institution
    Dept. of Mater. Sci. & Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Firstpage
    154
  • Lastpage
    160
  • Abstract
    Developed organic substrate solder flip chip bumping processes using a stencil printing method, followed by coining process performed by specially designed coining machine with controlled gas environment, temperature, and strain rate. The variations of process temperature are 25 (room temperature), 50, 100, 150, 200°C, and coining rate (considered by the process time) are 0.6, 1.2, 6.0, 12.0 μm/sec. Three types of solders, Sn-37Pb, Sn-3.5Ag, and Sn-3.8Ag-0.7Cu, were used to fabricate solder bumps. It is found that 120 μm pad opening size and 230 μm pitch PCB pads can be easily handled using electroformed stencil-printing masks. The diameter of the reflowed solder bumps was 150 μm and the height above the solder mask was 85 μm. Coining has been successfully performed on these bumps until 25 μm height above the solder mask by using a modified tension/compression tester. It is found that the load vs. height plot of coined solder bump shows three stages of coining deformation. Coining loads were affected not only by Young´s modulus and yield strength but also by more complex factors such as density and ductility of solders.
  • Keywords
    Young´s modulus; ductility; flip-chip devices; masks; printed circuit manufacture; printing; reflow soldering; 120 micron; 150 micron; 230 micron; 25 micron; 25 to 200 degC; 85 micron; PCB pads; Sn-Ag; Sn-Ag-Cu; Sn-Pb; Young´s modulus; coined solder bumps; coining process; coining rate; controlled gas environment; density; ductility; electroformed stencil-printing masks; modified tension/compression tester; organic substrate; pad opening size; process temperature; reflowed solder bumps; solder flip chip bumping processes; stencil printing method; strain rate; yield strength; Assembly; Atherosclerosis; Circuits; Compressive stress; Costs; Flip chip; Materials science and technology; Organic materials; Printing; Temperature dependence;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2002. Proceedings. 52nd
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7430-4
  • Type

    conf

  • DOI
    10.1109/ECTC.2002.1008089
  • Filename
    1008089