Effects of skewing CMOS output driver switching on the `simultaneous´ switching noise

Author

Senthinathan, R. ; Prince, J.L. ; Nimmagadda, S.

Author_Institution

Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA

fYear

1991

Firstpage

342

Lastpage

345

Abstract

A detailed study of the characteristics of CMOS receiver noise immunity and the effects of skewing CMOS output drives on simultaneous switching noise was performed. Closed-form equations are given to calculate the simultaneous switching noise and the number of V _DD/V_SS bond pads-package pins in multichip modules. Guidelines for grouping and optimal skewing of CMOS output drivers to reduce the total effective power/ground noise are discussed. Performance trade-offs in using an additional damping resistor in the output driver circuit to reduce power/ground noise were analyzed. Design curves are given to minimize the effective switching noise without much trade-off in output driver speed

Keywords

CMOS integrated circuits; driver circuits; electron device noise; packaging; switching; CMOS output driver; MCM; multichip modules; package parasitics; power/ground noise; receiver noise immunity; simultaneous switching noise; Bonding; Circuit noise; Damping; Driver circuits; Equations; Guidelines; Multichip modules; Noise reduction; Pins; Resistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-0155-2

Type

conf

DOI

10.1109/IEMT.1991.279810

Filename

279810