DocumentCode :
1693265
Title :
Innovative stack-die package - S2BGA
Author :
Wu, Lany ; Wang, Y.P. ; Hsiao, C.S.
Author_Institution :
Siliconware Precision Industries Co. Ltd., Taichung, Taiwan
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
250
Lastpage :
253
Abstract :
The stack-die package concept emerged 2∼3 years ago. The major product a stack-die package with flash and SRAM chips integrated together, used in cellular phones for the purpose of size and weight reduction. The basic requirement for these two dies in a stacked package is that the size difference must be large enough to allow a wire bonding process at the bottom die, if we still want to utilize the low cost, mature wire bonding technology in interconnections. However, this requirement will limit the application in trying to integrate two similar or same sized dies into a single stack-die package. One solution for this application is to utilize flip chip technology in the interconnection, to solve the die size difference requirement. One of the concerns for this package is the higher assembly cost due to flip chip interconnection. Therefore, a low cost, high reliability alternative package structure is created, it is named S2BGA (spacer stacked ball grid array). In this package, a silicon spacer is deposited between top and bottom dies to offer enough space for the wire bonding process. Since mature wire bonding technology is still utilized, a reliable and cost effective stack-die package is provided but maintains the same package size.
Keywords :
SRAM chips; ball grid arrays; flash memories; flip-chip devices; integrated circuit bonding; integrated circuit interconnections; integrated circuit packaging; lead bonding; S2BGA stack-die package; Si; bottom die bonding; cellular phone applications; flip chip interconnection technology; high reliability package structure; integrated SRAM chips; integrated die size difference; integrated flash chips; low cost package structure; silicon spacer; spacer stacked ball grid array; top die bonding; wire bonding interconnection technology; wire bonding process; Assembly; Bonding processes; Cellular phones; Costs; Electronics packaging; Flip chip; SRAM chips; Silicon; Space technology; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
ISSN :
0569-5503
Print_ISBN :
0-7803-7430-4
Type :
conf
DOI :
10.1109/ECTC.2002.1008102
Filename :
1008102
Link To Document :
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