Advanced soft fail characterization methodology for sub-28nm nanoscale SRAM yield improvement

Author

Jianhua Yin ; Fernandes, Sueli ; Yinzhe Ma ; Sheng Xie ; Xuemei Liu ; Qiushi Wang ; Dexter, M. ; Meixiong Zhao ; Mann, R. ; Chong Khiam Oh ; Tay, Mark ; Lim, Sung Kyu ; Dapeng Sun ; Chao, Paul ; Lam, James

Author_Institution

GLOBALFOUNDRIES U. S., Malta, NY, USA

fYear

2014

fDate

19-21 May 2014

Firstpage

351

Lastpage

356

Abstract

CMOS device miniaturization and the rapidly growing demand for mobile or power-aware systems have resulted in an urgent need to lower down power supply voltage (Vdd). However, soft fails at low Vdd in SRAM Array become a major yield limiter due to process variation and VT mismatch. This paper describes an advanced characterization flow on soft fails with the combination of applying fail-specified functional memory patterns, circuit analysis and advanced PFA techniques. The flow was successfully applied in soft fail characterization for sub-28nm SRAM yield improvement.

Keywords

SRAM chips; integrated circuit yield; logic testing; CMOS device miniaturization; advanced PFA techniques; advanced soft fail characterization methodology; circuit analysis; fail specified functional memory patterns; nanoscale SRAM yield improvement; power aware systems; Arrays; Logic gates; SRAM cells; Testing; Transistors; 6-T SRAM; nano-probing; soft fail characterization; yield improvement;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Semiconductor Manufacturing Conference (ASMC), 2014 25th Annual SEMI

Conference_Location

Saratoga Springs, NY

Type

conf

DOI

10.1109/ASMC.2014.6846953

Filename

6846953