Practical approaches to improve thermal SOA for smart power IC

Author

Nitta, T. ; Omichi, A. ; Yanagi, S. ; Yoshihisa, Y. ; Kuroi, T. ; Hatasako, K. ; Maegawa, S. ; Furuya, K.

Author_Institution

Renesas Electron. Corp., Itami, Japan

fYear

2011

Firstpage

344

Lastpage

347

Abstract

In this paper, approaches to improve thermal SOA (T-SOA) of LDMOS have been presented. We show three important points for T-SOA based on experimental data. Firstly, improvement of thermal stability, which is expressed by simple index “α”; a ratio of drain current at 200°C divided by that at 25°C. Secondly, suppression of parasitic NPN action that causes device destruction and the correlation between failure energy and off-state leak current is studied. Thirdly, reduction of the thermal impedance. We examined an effect of Cu plate on wafer surface and a thinning effect of wafer thickness, and found thinner wafers were quite effective for long pulse energy.

Keywords

MOS integrated circuits; copper; power integrated circuits; semiconductor optical amplifiers; thermal stability; Cu; LDMOS; T-SOA; failure energy; off-state leak current; parasitic NPN action suppression; semiconductor optical amplifiers; smart power IC; temperature 200 C; temperature 25 C; thermal SOA; thermal impedance reduction; thermal stability; thinner wafers; wafer surface; wafer thickness thinning effect; Copper; Current measurement; Impedance; Indexes; Semiconductor optical amplifiers; Stability criteria; Thermal stability;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs (ISPSD), 2011 IEEE 23rd International Symposium on

Conference_Location

San Diego, CA

ISSN

1943-653X

Print_ISBN

978-1-4244-8425-6

Type

conf

DOI

10.1109/ISPSD.2011.5890861

Filename

5890861