A novel silicon-embedded coreless transformer for isolated DC-DC converter application

In this paper, a novel silicon-embedded coreless transformer (SECT) is proposed and demonstrated for isolated dc-dc converter applications. By embedding two interleaved thick Cu coils in the bottom layer of the Si substrate, the designed 2 mm² SECT can achieve a maximum transformer efficiency of 85% at 50 MHz. Compared to the on-silicon coreless power transformer reported earlier for 0.5 W isolated dc-dc conversion at 170 MHz with a transformer efficiency of over 70%, the much lower operating frequency of the SECT allows the power losses of the power MOSFETs and Schottky diodes to be reduced by around 50%, leading to a converter loss reduction of 38%. Since only 4 vias are opened at the top layer of the substrate, most of the top layer of the substrate can be used for power IC implementation to achieve efficient monolithic integration. Experimental results show that the SECT provides a maximum transformer efficiency of 73% at 50 MHz, which is lower than expected and due to the non-optimized isolation oxide used.