Instabilities in modern bipolar transistors during the turn-off under inductive loads

The different instabilities exhibited by power BJTs during inductive turn-off are classified and then studied theoretically by means of a 2-D simulator in which the device is simulated within a realistic external circuit, and experimentally by means of a non-destructive method. It is shown that many instabilities originate from an interaction between electric field and charge within a single cell, which causes transit time oscillation phenomena. The role of the stray capacitance of the circuit in favouring these instabilities is described. Other kinds of instability cannot be understood by studying a single cell but rather require an account for the interactions between cells. An “Instabilily Map” is finally used as a synthetic picture of the device behaviour which ensures an easy way for linking device behaviour to its physical features