IC manufacturing diagnosis based on statistical analysis techniques

The authors present algorithms which can be used to analyze parametric data for the purposes of understanding the causes of yield loss for a batch of manufactured wafers. Data from an industrial fabrication line were analyzed to show the validity of the approach. Key features of this approach are a brief learning phase and the ability to use both spatial information and electrical characteristics in the analysis. The short learning phase is achieved because only sensitivity information is collected from the simulators. The spatial information is derived from the stochastic models used for the performances. The linearity assumptions, implicitly made when a sample correlation matrix is computed, are checked when a factor cannot be interrupted