Analysis of TSV geometric parameter impact on switching noise in 3D power distribution network

This paper reports on modeling of simultaneous switching noise (SSN) in 3D TSV-based system with multiple IC chips stacked and connected through TSVs. TSVs and other components are modeled using full-wave electromagnetic tools to extract equivalent circuit models. Power distribution network (PDN) combining on-chip and off-chip components are simulated with SPICE. The voltage noise generated by switching current is analyzed to exanimate the impact of TSV geometric parameters such as TSV dimensions, pitch, and number. The current noise in TSV is also extracted for the potential impact on signal integrity. The impacts of TSV geometric parameters on the PDN noise are limited impacts at frequencies below 1 GHz. However, the frequencies of inter-chip resonances are sensitive to TSV geometric parameters. These resonant frequencies are often in the range of 1 GHz - 10 GHz, which may coincide with the clock frequency and induce significant noises.