DocumentCode :
1694019
Title :
Electromigration failures of UBM/bump systems of flip-chip packages
Author :
Wu, J.D. ; Zheng, P.J. ; Lee, Kelly ; Chiu, C.T. ; Lee, J.J.
Author_Institution :
Adv. Semicond. Eng. Inc., Kaohsiung, Taiwan
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
452
Lastpage :
457
Abstract :
A flip-chip package is studied in a high temperature operation life test to evaluate the structural integrity of under bump metallurgy (UBM) and solder bumps. To understand the impact of current polarity on solder bumps, a reverse engineering methodology is employed to calculate bump resistance histories having different current directions and metal trace resistance between two adjacent bumps. It is concluded that the observed high resistance increase is from bumps with electrical current flowing upward into the UBM/bump interface (cathode), while bumps having opposite current polarity cause only a minor resistance change. The direction of electron flow affects the reaction rates of UBM and flip-chip solder, resulting in different failure modes and degradation rates. The effects of current density and operation temperature are also probed. It is observed that operation temperature has a more direct and significant influence than current density on bump failures owing to the low melting point characteristics of eutectic solder. Failed test vehicles are subjected to cross section analysis via SEM, the identified failure sites are from aforementioned high resistance bumps with structural damage at the region of UBM and UBM/bump interfaces.
Keywords :
ball grid arrays; circuit reliability; current density; electromigration; environmental testing; failure analysis; flip-chip devices; life testing; reverse engineering; scanning electron microscopy; soldering; Al-NiV-Cu; Al-NiV-Cu trilayer metal film; SEM; Sn-Pb eutectic solder; SnPb; UBM/bump systems; bump resistance histories; cross section analysis; current density; current polarity; degradation rates; electromigration failures; electron flow direction; failure modes; flip-chip BGA; flip-chip packages; flip-chip solder; high resistance increase; high temperature operation life test; joint reliability; low melting point eutectic solder; metal trace resistance; operation temperature; reaction rates; reverse engineering methodology; solder bumps; structural damage; structural integrity; under bump metallurgy; Cathodes; Current density; Electric resistance; Electromigration; Electrons; History; Life testing; Packaging; Reverse engineering; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2002. Proceedings. 52nd
ISSN :
0569-5503
Print_ISBN :
0-7803-7430-4
Type :
conf
DOI :
10.1109/ECTC.2002.1008135
Filename :
1008135
Link To Document :
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