DocumentCode :
1694203
Title :
Signature verification: a new concept for building simple and effective watchdog processors
Author :
Madeira, Henrique ; Camões, José ; Silva, João Gabriel
Author_Institution :
Dept. of Electr. Eng., Coimbra Univ., Portugal
fYear :
1991
Firstpage :
1188
Abstract :
A description is given of the architecture of Checker, which is a watchdog processor that is able to detect transient, intermittent, and permanent errors in multiple-processor systems using online signature analysis. The signatures are stored in the local memory of Checker and are verified according to a new approach called online signature verification. In this approach, the storage requirements for control flow information of the application programs are substantially reduced and the design of the watchdog processor is greatly simplified
Keywords :
computerised monitoring; error detection; multiprocessing systems; Checker; application programs; architecture; control flow information; design; error detection; intermittent errors; local memory; multiple-processor systems; online signature analysis; online signature verification; permanent errors; storage; system monitoring; transient errors; watchdog processors; Application software; Buildings; Control systems; Error correction; Flow graphs; Handwriting recognition; Hardware; Monitoring; Runtime; Transient analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Conference_Location :
LJubljana
Print_ISBN :
0-87942-655-1
Type :
conf
DOI :
10.1109/MELCON.1991.162054
Filename :
162054
Link To Document :
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