Defect engineering for carrier lifetime control in high voltage GaAs power diodes

The paper considers the physical basis for the technique of controllable defect formation at heterointerfaces and in the bulk of epitaxial GaAs layers in the process of isovalent doping. Results of studying crystal defects and their rearrangement depending on the isovalent doping modes in the process of epitaxial growth are presented. The main aspects of the defect influence on the charge carrier lifetime as well as on the diode structure blocking voltage are analyzed. Particular cases of the developed technique application for controllable defect formation in fabricating such GaAs-based devices as Hyper Fast Recovery Epitaxial Diodes and Drift Step Recovery Diodes are considered.