Title :
Construction of random input-output codes with moderate block lengths
Author :
Motwani, Ravi ; Yaakobi, Eitan
Author_Institution :
Non-Volatile Syst. Group, Intel Corp., Santa Clara, CA, USA
Abstract :
Random I/O (RIO) Codes, recently introduced by Sharon and Alrod, is a coding scheme to improve the random input/output performance of flash memories. Multi-level flash memories require, on the average, more than a single read threshold in order to read a single logical page. This number is important to be optimized since it sets the read latency of flash memories. An (n,M, t) RIO code assumes that t pages are stored in n cells with t + 1 levels. The first page is read by applying a read threshold between levels t and t + 1. Similarly, the second page is read by applying a read threshold between levels t - 1 and t, and so on. The read binary vectors for consecutive pages satisfy the property that the set of positions read with value 1 can only increase. Therefore, Sharon and Alrod showed also that the design of RIO codes is equivalent to the design of WOM codes. The latter family of codes attracted a lot of attention in recent years in order to improve the lifetime of flash memories by allowing to write multiple messages to the memory without the need for a physical erase. In this paper we notice two important distinctions between RIO codes and WOM codes. While in WOM codes the messages are received one after the other and thus are not known all in advance, in RIO codes the information of all logical pages can be known in advance when programming the cells. Even though this knowledge does not improve the capacity of RIO codes, it allows the design of efficient high-rate codes with a moderate block length, which are hard to be found for WOM codes. We also study another family of RIO codes, called here partial RIO Codes, that allow to find even more efficient codes in the tradeoff of reading more than a single threshold to read a page.
Keywords :
block codes; flash memories; random codes; RIO codes; WOM codes; block lengths; coding scheme; multilevel flash memories; random input-output codes; Ash; Bismuth; Decoding; Encoding; Hypercubes; Upper bound; Vectors;
Conference_Titel :
Information Theory Workshop (ITW), 2014 IEEE
Conference_Location :
Hobart, TAS
DOI :
10.1109/ITW.2014.6970902