DocumentCode :
1695034
Title :
A folding ADC employing a robust symmetrical number system with Gray-code properties
Author :
Pace, P.E. ; Styer, D. ; Akin, I.A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA
Volume :
1
fYear :
1998
Firstpage :
397
Abstract :
A folding analog-to-digital converter (ADC) preprocessing design based on a new robust symmetrical number system (RSNS) is presented. The RSNS preprocessing architecture is a modular scheme in which the integer values within each modulus (comparator states), when considered together, change one at a time at the next position (Gray code properties). Although the observed dynamic range of the RSNS ADC is somewhat less than the optimum symmetrical number system ADC, the RSNS Gray code properties make it particularly attractive for error control. With the RSNS preprocessing, the encoding errors due to comparator thresholds not being crossed simultaneously are eliminated. As a result, the interpolation circuits can be removed and only a small number of comparators are required. Computer generated data are used to help determine the properties of the RSNS. These properties include the dynamic range (largest number of distinct consecutive vectors) and the location of the dynamic range within the number system. Closed-form expressions for the dynamic range are also presented for channel moduli of the form m1=2k-1, m2=2k, m3=2k+1. To compare the advantages of the RSNS ADC with previously published results, the transfer function of a 3-channel architecture (k=2) is evaluated numerically using SPICE
Keywords :
Gray codes; analogue-digital conversion; coding errors; digital arithmetic; Gray-code properties; RSNS preprocessing architecture; channel moduli; closed-form expressions; comparator thresholds; dynamic range; encoding errors; error control; folding ADC; folding analog-to-digital converter; modular scheme; robust symmetrical number system; transfer function; Analog-digital conversion; Circuits; Closed-form solution; Computer errors; Dynamic range; Error correction; Interpolation; Reflective binary codes; Robustness; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
Type :
conf
DOI :
10.1109/ISCAS.1998.704453
Filename :
704453
Link To Document :
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