Low input impedance current comparator using in pulse-width modulation

This work presents a design of continuous-time current comparator with ultra low input impedance, which especially benefits on enhancing the accuracy of pulse-width-modulation (PWM). The proposed design reduces the input impedance by utilizing common-gate structure as input stage. The further use of a common-source feedback structure also enables extremely reduction of the input impedance. In addition, the proposed design can be applied to perform precise comparison between two terminals with varied currents since the input impedances are well designed to be balanced. The experiment results demonstrate competitive performance. With input current of 25MHz square wave, the input impedance and propagation delay of comparator are merely 66.9Ω and 2.06ns respectively while the average power consumption is about 1.16mW under the implementation of TSMC 0.35μm CMOS process with 3V power supply.