Design and Study on a New BCH Coding and Interleaving Techniques Based on ARM Chip

In order to improve the reliability of communication, the bit error rate is reduced by the scheme of Bose-Chaudhuri-Hocquenghem (BCH) coding and decoding integrated with interleaving. Based on the analysis of the traditional BCH coding and decoding algorithm, a fast method of BCH coding and decoding, which is suitable for advanced RISC machines (ARM) realization, is presented. After a reasonable interleaver has been chosen comparatively, the feasibility of this scheme is validated by MATALAB. Furthermore, the technique, combining BCH coding with interleaving are realized on ARM chip. The laboratorial result shows that the running speed is advanced and the reliability of data transmission is greatly improved.