Efficient realization of digital logic circuit using QCA multiplexer

Quantum-dot cellular Automata (QCA), a viable alternative to current CMOS, is gaining its prominence in digital circuit due to its very high device density and clocking speed. This work targets design of efficient logic circuits based on QCA multiplexer. The design capability of the multiplexer in QCA is investigated implementing XOR, XNOR logic gate and arithmetic logic unit. Further, efficient sequential circuits like D latch, T latch, D flip-flop, Scan flip-flop, shift registers are designed using QCA multiplexer. Results obtained supports the fact that the proposed designs achieve significant improvement in terms of device density, cell count as well as clock delay than that of the other previous designs.