Title :
Scheduling of cluster tools with ready time constraints for small lot production
Author :
Kim, Hyun-Jung ; Lee, Tae-Eog
Author_Institution :
Dept. of Ind. & Syst. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
Abstract :
We examine a scheduling problem regarding cluster tools for small lot production. Most work on scheduling of cluster tools assumed large identical wafer lots, and examined cyclic scheduling that repeats identical work cycles. However, nowadays, the lot size tends to be extremely small, even being only 5-8 wafers whereas conventional lots have 25 identical wafers. It is not reasonable to use cyclic scheduling for such small lot production because the number of identical work cycles is too small as compared to the lengths of the starting and closing transient periods. We therefore examine a new scheduling method for cluster tools with ready time constraints on the chambers and the robot, from which the resources are freed from processing the preceding lot. To solve this scheduling problem, we develop a Petri net model which is a graphical and mathematical method for a discrete event dynamic system. Based on the Petri net model, we develop a mixed integer programming (MIP) model and a branch & bound (B&B) algorithm for determining an optimal schedule that minimizes the makespan. For a single-armed tool, the algorithm can efficiently solve the scheduling problem for lots with up to 25 wafers. However, for a dual-armed tool, the computation time grows quickly as the number of wafers increases. Therefore, we propose an approximate method that schedules only the first few wafers non-cyclically and the remaining wafers cyclically. From experiments, we conclude that the approximate method provides good solutions with less than a 1% error. The proposed methods can be used even when full lots of 25 wafers are frequently switched.
Keywords :
Petri nets; discrete event systems; integer programming; lot sizing; pattern clustering; scheduling; semiconductor device manufacture; tree searching; Petri net model; branch & bound algorithm; cluster tool scheduling problem; cyclic scheduling; discrete event dynamic system; graphical method; identical wafer lots; makespan minimization; mathematical method; mixed integer programming model; ready time constraints; semiconductor manufacturing industry; small lot production; transient periods; Algorithm design and analysis; Computational modeling; Firing; Mathematical model; Optimal scheduling; Robots; Semiconductor device modeling; Petri net; cluster tool; non-cyclic scheduling; ready time constraints; small lot production;
Conference_Titel :
Automation Science and Engineering (CASE), 2011 IEEE Conference on
Conference_Location :
Trieste
Print_ISBN :
978-1-4577-1730-7
Electronic_ISBN :
2161-8070
DOI :
10.1109/CASE.2011.6042518