Based IBIST auto-parallel reconfiguration of TSV defect in 3D-IC

Author

Benabdeladhim, Mohamed ; Hamdi, Belgacem ; Fradi, Aymen

Author_Institution

Dept. of Phys., Fac. of Sci. of Monastir, Monastir, Tunisia

fYear

2015

Firstpage

1

Lastpage

6

Abstract

TSV or interconnect between chips have as a promising solution for overcoming interconnect and power bottlenecks in 3D IC. However, testing of 3D ICs remains a significant challenge, and breakthroughs in test technology are needed to make 3D integration commercially viable. This paper first presents an overview of TSV-related defects and the impact of TSVs in the form of new defects in devices and interconnects. Then, we propose an improvement of IBIST by a circuit reconfiguration to help us to use the same circuit in the presence of default interconnections. This paper first presented an overview of TSV defects. Then, we propose an improvement of IBIST (Interconnect Build-In Self-Test) by a circuit reconfiguration RIBIST in order to overcome the obstacles.

Keywords

built-in self test; integrated circuit interconnections; integrated circuit testing; three-dimensional integrated circuits; 3D-IC testing; IBIST autoparallel reconfiguration; TSV defect; chip interconnect; circuit reconfiguration; interconnect build-in self-test; three dimensional integrated circuit; through silicon via; Generators; Integrated circuit interconnections; Silicon; Testing; Three-dimensional displays; Through-silicon vias; 3D IC; IBIST; RIBIST; Reconfiguration; TSV; Test;

fLanguage

English

Publisher

ieee

Conference_Titel

Web Applications and Networking (WSWAN), 2015 2nd World Symposium on

Conference_Location

Sousse

Print_ISBN

978-1-4799-8171-7

Type

conf

DOI

10.1109/WSWAN.2015.7210312

Filename

7210312