Abstract :
The following topics are dealt with: GALS; NOC; deleay insensitivity; arbitration; high-level design; low-power design.
Keywords :
asynchronous circuits; high level synthesis; low-power electronics; network-on-chip; GALS; NOC; arbitration; asynchronous circuits; delay-insensitivity; high-level design; logic synthesis; low-power design;
Conference_Titel :
Asynchronous Circuits and Systems, 2009. ASYNC '09. 15th IEEE Symposium on
Conference_Location :
Chapel Hill, NC
Print_ISBN :
978-1-4244-3933-1
DOI :
10.1109/ASYNC.2009.32
