Title :
Design and Implementation of a GALS Adapter for ANoC Based Architectures
Author :
Thonnart, Yvain ; Beigne, Edith ; Vivet, Pascal
Author_Institution :
LETI - MINATEC, CEA, Grenoble
Abstract :
As Globally Asynchronous Locally Synchronous (GALS) systems are becoming preponderant in complex SoC and NoC, we present the design and implementation of a new GALS adapter to be used in ANoC, an asynchronous NoC architecture. The proposed GALS adapter is a complete IP integration module, including a new FIFO based design using a Johnson-encoding principle for timing domains interfacing, and a local programmable clock generator for the IP unit. The GALS adapter has been implemented in a ST 65 nm technology in standard-cell based design. It is provided as a hard-macro for easy IP integration, can generate 256 clock frequencies from 25 MHz to 1 GHz, and achieves 500 MHz nominal throughput from a clocked domain to a QDI asynchronous logic NoC.
Keywords :
asynchronous circuits; logic circuits; logic design; network-on-chip; ANoC; FIFO based design; GALS adapter implementation; IP integration module; Johnson-encoding principle; QDI asynchronous logic NoC; SoC; asynchronous NoC architecture; frequency 25 MHz to 1 GHz; frequency 500 MHz; globally asynchronous locally synchronous system; local programmable clock generator; size 65 nm; standard-cell based design; Clocks; Computer architecture; Delay; Frequency; Integrated circuit interconnections; Network-on-a-chip; Quality of service; Synchronization; Throughput; Timing; Asynchronous logic circuits; GALS architectures;
Conference_Titel :
Asynchronous Circuits and Systems, 2009. ASYNC '09. 15th IEEE Symposium on
Conference_Location :
Chapel Hill, NC
Print_ISBN :
978-1-4244-3933-1
DOI :
10.1109/ASYNC.2009.13
