DocumentCode
1696831
Title
Design and Evaluation of a Multiprocessor Architecture with Decentralized Control
Author
Chung, Hsiao-Chen ; Wu, Chuan-lin ; Rakes, James ; Zievers, Peter J. ; Lin, Yin-Kuan
Author_Institution
The University of Texas at Austin, USA
Volume
1
fYear
1994
Firstpage
97
Lastpage
100
Abstract
This paper presents design and evaluation of a decentralized control mechanism of a variable-topology (phase-reconfigurable) multiprocessor architecture. We design and implement an active crossbar communication processor(XCP) which encodes a set of communication instructions. The new interconnection network approach provides an apt phase-reconfiguration method. The new method is distributed in nature and does not require a global control bus that is a time consuming feature as verified in many existing systems. A conjugate-gradient algorithm for solving a linear system equations is used to perform evaluation and comparison.
Keywords
Broadcasting; Communication switching; Communication system control; Computer architecture; Concurrent computing; Delay; Distributed control; Multiprocessor interconnection networks; Network synthesis; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing, 1994. Vol. 1. ICPP 1994. International Conference on
Conference_Location
North Carolina State University, NC, USA
ISSN
0190-3918
Print_ISBN
0-8493-2493-9
Type
conf
DOI
10.1109/ICPP.1994.87
Filename
4115700
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