DocumentCode
169710
Title
On-chip self-awareness using Cyberphysical-Systems-on-Chip (CPSoC)
Author
Sarma, Sridevi ; Dutt, Nikil ; Gupta, Puneet ; Nicolau, A. ; Venkatasubramanian, N.
Author_Institution
Dept. of Comput. Sci., Univ. of California Irvine, Irvine, CA, USA
fYear
2014
fDate
12-17 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
We presented CPSoC, a self-aware sensor-actuator-rich MPSoC platform that deploys the computation-communication-control codesign of CPS together with cross-layer adaptations to achieve multiple design objectives. The CPSoC paradigm enables on-chip self-awareness (selective or opportunistic) adaptation using the concepts of cross-layer physical and virtual sensing and actuations. In [3] we illustrate CPSoC´s potential for self-awareness and cross-layer adaptations using several examples and have developed an FPGA prototype to emulate a typical CPSoC.
Keywords
actuators; field programmable gate arrays; sensors; system-on-chip; CPSoC paradigm; FPGA prototype; control-communication-computing system codesign; cyberphysical-system-on-chip; on-chip cross-layer actuation; on-chip cross-layer sensing; on-chip self-awareness; on-chip sensing; physical environment; sensor-actuator rich many-core computing platforms; Aging; Computer architecture; Delays; Predictive models; Quality of service; Sensors; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2014 International Conference on
Conference_Location
New Delhi
Type
conf
DOI
10.1145/2656075.2661648
Filename
6971838
Link To Document