Title :
Transparent memory testing for pattern sensitive faults
Author :
Karpovsky, M.G. ; Yarmolik, V.N.
Author_Institution :
Coll. of Eng., Boston Univ., MA, USA
Abstract :
This paper presents a new methodology for RAM testing based on PS(n, k) fault model (the k out of n pattern sensitive fault model). According to the model the contents of any memory cell which belongs to an n-bit memory block, or ability to change the contents, is influenced by the contents of any k-1 cells from this block. This paper includes the investigation of memory testing approaches based on the transparent pseudoexhaustive testing and its approximations by pseudorandom circular tests, which can be used for periodic and manufacturing testing and require lower hardware and time overheads than the standard approaches
Keywords :
built-in self test; fault diagnosis; logic testing; random-access storage; RAM testing; fault model; manufacturing environment; memory testing; n-bit memory block; overheads; pattern sensitive faults; periodic testing; production testing; pseudorandom circular tests; transparent memory testing; transparent pseudoexhaustive testing; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Error correction; Hardware; Pulp manufacturing; Random access memory; Read-write memory;
Conference_Titel :
Test Conference, 1994. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2103-0
DOI :
10.1109/TEST.1994.528033
