Title :
RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores
Author :
Panic, M. ; Kehr, S. ; Quinones, E. ; Boddecker, B. ; Abella, J. ; Cazorla, F.J.
Author_Institution :
Univ. Politec. de Catalunya (UPC), Barcelona, Spain
Abstract :
Automotive applications increasingly rely on AUTOSAR for their design and execution. AUTOSAR applications comprise functions, called runnables, that are grouped into AUTOSAR tasks. Tasks are the unit of scheduling (UoS) of the AUTOSAR operating system as the legacy of the single-core platforms. However, on multi-core platforms using tasks as UoS considerably reduces the available parallelism due to communication dependencies, which in turn reduces the potential average and guaranteed performance obtainable with multi-cores. Furthermore, running tasks in parallel requires re-validating the functional correctness of the application, since current AUTOSAR applications are designed following a sequential execution model of tasks. In this paper, we propose a new allocation algorithm, RunPar, that considers runnables and not tasks as the UoS and assigns runnables that form tasks to different cores. RunPar improves the application performance, while keeping the sequential execution of tasks, hence not requiring any extra validation effort when migrating AUTOSAR applications from single-core to the multi-core platforms. We evaluate RunPar with a real automotive application, an Engine Management System (EMS) for which we observe an average WCET reduction on EMS´ tasks of 26% and 30% in a two-core and four-core ECU.
Keywords :
automotive electronics; multiprocessing systems; open systems; operating systems (computers); processor scheduling; resource allocation; software architecture; AUTOSAR operating system; ECU; RunPar; UoS; WCET reduction; allocation algorithm; automotive open system architecture; electronic control units; engine management system; multicore platforms; runnable parallelism; unit-of-scheduling; Automotive applications; Energy management; Multicore processing; Resource management; Timing;
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2014 International Conference on
Conference_Location :
New Delhi
DOI :
10.1145/2656075.2656096