Title :
Delayed line bus scheme: a low-power bus scheme for coupled on-chip buses
Author :
Ghoneima, Maged ; Ismail, Yousr
Author_Institution :
Northwestern Univ., Evanston, IL, USA
Abstract :
This paper presents a comprehensive qualitative and analytical analysis of the effect of relative delay on the dissipated energy of coupled lines. Closed form expressions modeling the effect of relative delay on the dissipated energy, and the Miller coupling factor, MCF, are also presented. Skewing the worst switching case is shown to provide up to 50% reduction in energy dissipation. This observation was implemented in a low-power bus scheme, DLBS, which leads to a power reduction of up to 25%.
Keywords :
delays; low-power electronics; switching; system buses; Miller coupling factor; coupled on-chip buses; delayed line bus scheme; dissipated energy; interconnects; low-power bus scheme; oppositely switching adjacent lines; relative delay; similarly switching adjacent lines; worst switching case skewing; Capacitance; Capacitors; Circuit simulation; Coupling circuits; Delay effects; Delay lines; Energy dissipation; Power dissipation; Semiconductor device modeling; Voltage;
Conference_Titel :
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
1-58113-929-2
DOI :
10.1109/LPE.2004.1349310
