A 12.5 Gb/s Si bipolar IC for PRBS generation and bit error detection up to 25 Gb/s

Author

Bussmann, M. ; Langmann, U. ; Hillery, B. ; Brown, W.W.

Author_Institution

Ruhr-Univ. Bochum, Germany

fYear

1993

Firstpage

152

Lastpage

153

Abstract

Reliable testing at multi-Gb/s frequencies has become a major issue in the development of high-speed optical fiber communication systems and components. According to CCITT recommendation O.151, pseudorandom binary sequences (PRBS) are required for testing. Commercially available hybrid PRBS test equipment covers data rates up to about 15 Gb/s. The test of circuits for data rates above 15 Gb/s relies on custom-tailored equipment. A monolithic solution to the test problem that offers PRBS generation, bit-error detection, scrambling, and descrambling for two channels to 12.5 Gb/s with on-chip trigger derivation is presented. A 1-channel PRBS up to 25 Gb/s is directly derived from two outputs by external multiplexing. Sequence length is switchable between 2/sup 11/-1 and 2/sup 15/-1 (CCITT rec.).<>

Keywords

binary sequences; bipolar integrated circuits; digital communication systems; digital integrated circuits; elemental semiconductors; error detection; optical links; signal generators; silicon; test equipment; 12.5 Gbit/s; 25 Gbit/s; CCITT recommendation O.151; PRBS generation; Si; bipolar IC; bit error detection; descrambling; external multiplexing; high-speed; on-chip trigger derivation; optical fiber communication systems; pseudo-random binary sequences; pseudorandom binary sequences; scrambling; testing; Bipolar integrated circuits; Bit rate; Clocks; Driver circuits; Feedback loop; Flip-flops; High speed integrated circuits; Latches; Photonic integrated circuits; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-0987-1

Type

conf

DOI

10.1109/ISSCC.1993.280033

Filename

280033