DocumentCode :
1697435
Title :
Design of a Data Recovery Block for Communications over Power Distribution Networks of Microprocessors
Author :
Chawla, Vipul ; Thirugnanam, Rajesh ; Ha, Dong Sam ; Mak, T.M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA
fYear :
2008
Firstpage :
708
Lastpage :
712
Abstract :
We proposed the use of power distribution network (PDN) of a microprocessor for ubiquitous access of internal nodes for test/debug and showed the suitability of impulse ultra-wideband (UWB) communications for the purpose. This paper presents design of a data recovery block to recover data from UWB impulses superposed on a power line of a microprocessor. Considerations for data recovery block design based upon measured PDN characteristics have been discussed. The proposed circuit was implemented in TSMC 0.18 um CMOS process, and simulations show that it consumes 4.42 mW when operating from a 1.8 V supply and at a pulse repetition rate of 200 MHz.
Keywords :
CMOS integrated circuits; carrier transmission on power lines; distribution networks; microprocessor chips; ultra wideband communication; CMOS process; UWB impulses; data recovery block; microprocessor power line; power 4.42 mW; power distribution network; size 0.18 mum; ultra-wideband communication; voltage 1.8 V; Automatic testing; Circuit noise; Circuit testing; Frequency; Low-frequency noise; Microprocessors; Power line communications; Power systems; Programmable control; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems for Communications, 2008. ICCSC 2008. 4th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-1707-0
Electronic_ISBN :
978-1-4244-1708-7
Type :
conf
DOI :
10.1109/ICCSC.2008.155
Filename :
4536847
Link To Document :
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