• DocumentCode
    1697597
  • Title

    Compiler Optimization Technique for Data Cache Prefetching Using a Small CAM Array

  • Author

    Chi-Hung Chi

  • Author_Institution
    The Chinese University of Hong Kong, Hong Kong
  • Volume
    1
  • fYear
    1994
  • Firstpage
    263
  • Lastpage
    266
  • Abstract
    With advances in compiler optimization and program flow analysis, software assisted cache prefetching schemes using PREFETCH instructions are now possible. Although data can be prefetched accurately into the cache, the runtime overhead associated with these schemes often limits their practical use. In this paper, we propose a new scheme, called the Stride_CAM Data Prefetching (SCP), to prefetch array references with constant strides accurately. Compared to current software assisted data prefetching schemes, the SCP scheme has much lower runtime overhead without sacrificing prefetching accuracy. Our result showed that the SCP scheme is particularly suitable for computing intensive scientific applications where cache misses are mainly due to array references with constant strides and they can be prefetched very accurately by this SCP scheme.
  • Keywords
    CADCAM; Checkpointing; Clocks; Computer aided manufacturing; Degradation; Delay; Optimizing compilers; Parallel processing; Prefetching; Shift registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing, 1994. Vol. 1. ICPP 1994. International Conference on
  • Conference_Location
    North Carolina State University, NC, USA
  • ISSN
    0190-3918
  • Print_ISBN
    0-8493-2493-9
  • Type

    conf

  • DOI
    10.1109/ICPP.1994.71
  • Filename
    4115728