• DocumentCode
    1697686
  • Title

    Comparative analysis of HPC and accelerator devices: Computation, memory, I/O, and power

  • Author

    Richardson, Justin ; Fingulin, Steven ; Raghunathan, Diwakar ; Massie, Chris ; George, Alan ; Lam, Herman

  • Author_Institution
    ECE Dept., Univ. of Florida, Gainesville, FL, USA
  • fYear
    2010
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    The computing market constantly experiences the introduction of new devices, architectures, and enhancements to existing ones. Due to the number and diversity of processor and accelerator devices available, it is important to be able to objectively compare them based upon their capabilities regarding computation, I/O, power, and memory interfacing. This paper presents an extension to our existing suite of metrics to quantify additional characteristics of devices and highlight tradeoffs that exist between architectures and specific products. These metrics are applied to a large group of modern devices to evaluate their computational density, power consumption, I/O bandwidth, internal memory bandwidth, and external memory bandwidth.
  • Keywords
    multiprocessing systems; performance evaluation; HPC; I/O bandwidth; accelerator devices; computational density; external memory bandwidth; high-performance computing; internal memory bandwidth; power consumption; Bandwidth; Digital signal processing; Field programmable gate arrays; Memory management; Parallel processing; Performance evaluation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Performance Reconfigurable Computing Technology and Applications ( HPRCTA), 2010 Fourth International Workshop on
  • Conference_Location
    New Orleans, LA
  • ISSN
    2150-7945
  • Print_ISBN
    978-1-4244-9516-0
  • Electronic_ISBN
    2150-7945
  • Type

    conf

  • DOI
    10.1109/HPRCTA.2010.5670797
  • Filename
    5670797