DocumentCode
169792
Title
MPP Keynotes and Invited Speaker
Author
Mizan, Elias ; Flynn, Michael ; Arvind
Author_Institution
AMD, Sunnyvale, CA, USA
fYear
2014
fDate
22-24 Oct. 2014
Abstract
These keynote speeches discuss the following: Instruction Placement in a Dataflow Execution Model; Using dataflow as a high performance computing engine; Latency-Insensitive Bounded Dataflow Graphs.
Keywords
computer architecture; data flow computing; data flow graphs; computer architecture; dataflow execution mode; high performance computing engine; instruction placement; latency-insensitive bounded dataflow graph;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing Workshop (SBAC-PADW), 2014 International Symposium on
Conference_Location
Paris
Type
conf
DOI
10.1109/SBAC-PADW.2014.37
Filename
6972002
Link To Document