Title :
A new algorithm for improved VDD assignment in low power dual VDD systems
Author :
Kulkarni, Sarvesh H. ; Srivastava, Ashish N. ; Sylvester, Dennis
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Abstract :
We present the first in-depth study of the two existing algorithms namely, Clustered Voltage Scaling (CVS) and Extended Clustered Voltage Scaling (ECVS), used for assigning the voltage supply to gates in integrated circuits having dual power supplies. We present a comparison of the achievable power savings using these algorithms on various benchmark circuits and first point out that ECVS does provide appreciably larger power improvements compared to CVS. We then provide a new algorithm based on ECVS that further improves the power savings by efficient assignment of the power supplies to the gates. Our new algorithm provides up to 66% power reduction and improves the power savings by up to 28% and 13% with respect to CVS and ECVS respectively. Furthermore, since level conversion is an essential component of dual power supply systems we also present the first circuit-specific sensitivity study of achievable power savings to the energy and delay penalties imposed by level conversion.
Keywords :
CMOS logic circuits; VLSI; circuit layout CAD; integrated circuit layout; low-power electronics; power supply circuits; Huffman benchmark; VLSI; circuit-specific sensitivity; clustered voltage scaling; dual power supplies; extended clustered voltage scaling; hill-climbing factor; improved VDD assignment; level conversion; low power design algorithms; low power dual VDD systems; Algorithm design and analysis; CMOS technology; Circuits; Clustering algorithms; Degradation; Delay; Feeds; Power dissipation; Power supplies; Voltage;
Conference_Titel :
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
1-58113-929-2
DOI :
10.1109/LPE.2004.1349336
