A 660 Mb/s CMOS clock recovery circuit with instantaneous locking for NRZ data and burst-mode transmission

Describes a high-speed, low-power, fully-integrated clock recovery circuit that locks simultaneously to the first arriving NRZ (nonreturn-to-zero) data transition and at the same time handles data with low-transition densities. This performance is obtained by using a broadband open-loop approach based on matched gated oscillators. The relative standing of this technique compared to conventional nonoversampling methods is summarized. The scheme is implemented in standard 0.9- mu m CMOS digital technology and is designed for operation at 622 Mb/s.<>