Title :
A single-chip 266 Mb/s CMOS transmitter/receiver for serial data communications
Author :
Chen, D.-L. ; Waldron, R.
Author_Institution :
Microelectronic Products Div., NCR, Fort Collins, CO, USA
Abstract :
A single-chip 266-Mb/s CMOS transceiver that fully meets emerging ANSI Fibre Channel standards is described. All required functions specified in the FC-0 layer are integrated: on-chip phase-locked loops (PLL) for clock generation and recovery, a 10-channel time-division multiplexer and demultiplexer for fast parallel-to-serial and serial-to-parallel conversion, and word alignment logic. In addition, this device has on-chip CMOS emitter-coupled logic (ECL) receivers and drivers for high-speed serial input/output (I/O). Depending on the choice of medium, this chip can drive a coaxial cable directly or interface with an optical transceiver for fiber-optic connections.<>
Keywords :
CMOS integrated circuits; data communication equipment; integrated optoelectronics; optical communication equipment; optical fibres; phase-locked loops; transceivers; 266 Mbit/s; ANSI Fibre Channel standards; CMOS ECL receivers; CMOS transmitter/receiver; FC-0 layer; clock generation; clock recovery; coaxial cable; demultiplexer; fiber-optic connections; on-chip phase-locked loops; optical transceiver; parallel-to-serial conversion; serial data communications; serial input/output; serial-to-parallel conversion; time-division multiplexer; word alignment logic; ANSI standards; CMOS logic circuits; Clocks; Logic devices; Multiplexing; Optical fiber devices; Optical receivers; Optical transmitters; Phase locked loops; Transceivers;
Conference_Titel :
Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0987-1
DOI :
10.1109/ISSCC.1993.280067
