Title :
Which DRAM will win the great DRAM sweepstakes?
Author :
Slater, Mel ; Farmwald, M. ; Hannah, M. ; James, D.V. ; Karp, J.A. ; Kumanoya, M. ; Szarek, J.
Author_Institution :
MicroDesign Resources, Sebastapol, CA, USA
Abstract :
A summary of recent DRAM (dynamic random-access memory) development is presented. DRAM architectures using different philosophies have recently emerged to fill the needs of high-performance systems. Among these are cached DRAMs (CDRAMs), Rambus DRAMs (RDRAMs), RamLink DRAMs, and synchronous DRAMs (SDRAMs). Designers have more DRAM choices today than ever before. The following questions are examined: which will be the dominant issues when designers choose DRAMs? Will high bandwidth DRAMs displace the familiar RAS-CAS DRAM? If so, which will dominate and why?.<>
Keywords :
DRAM chips; buffer storage; memory architecture; CDRAMs; DRAM architectures; RDRAMs; RamLink DRAMs; Rambus DRAMs; SDRAMs; bandwidth; cached DRAMs; synchronous DRAMs; Bandwidth; Clocks; Computer graphics; Costs; High performance computing; Microprocessors; Random access memory; Resource management; Space technology; Technology management;
Conference_Titel :
Solid-State Circuits Conference, 1993. Digest of Technical Papers. 40th ISSCC., 1993 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0987-1
DOI :
10.1109/ISSCC.1993.280077
