DocumentCode
1698764
Title
Energy-aware demand paging on NAND flash-based embedded storages
Author
Park, Seon-Yeong ; Kang, Jeong-Uk ; Seon-Yeong Park ; Kim, Jin-Soo
fYear
2004
Firstpage
338
Lastpage
343
Abstract
The ever-increasing requirement for high-performance and huge-capacity memories of emerging embedded applications has led to the widespread adoption of SDRAM and NAND flash memory as main and secondary memories, respectively. In particular, the use of energy consuming memory, SDRAM, has become burdensome in battery-powered embedded systems. Intuitively, though demand paging can be used to mitigate the increasing requirement of main memory size, its applicability should be deliberately elaborated since NAND flash memory has asymmetric operation characteristics in terms of performance and energy consumption. In this paper, we present an energy-aware demand paging technique to lower the energy consumption of embedded systems considering the characteristics of interactive embedded applications with large memory footprints. We also propose a flash memory-aware page replacement policy that can reduce the number of write and erase operations in NAND flash memory. With real-life workloads, we show the system-wide energy-delay product can be reduced by 15∼30% compared to the traditional shadowing architecture.
Keywords
NAND circuits; delays; embedded systems; flash memories; integrated circuit measurement; integrated circuit modelling; low-power electronics; paged storage; NAND flash memory; NAND flash-based embedded storages; SDRAM; asymmetric operation characteristics; embedded applications; energy consumption; energy-aware demand paging; erase operations; flash memory-aware page replacement policy; interactive embedded applications; main memory; main memory size; memory capacity; memory footprints; real-life workloads; secondary memory; shadowing architecture; system-wide energy-delay product; write operations; Algorithm design and analysis; Computer science; Embedded system; Energy consumption; Energy storage; Memory management; Operating systems; Permission; SDRAM; Shadow mapping;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Print_ISBN
1-58113-929-2
Type
conf
DOI
10.1109/LPE.2004.1349362
Filename
1349362
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