Title :
Designing and Using FPGAs beyond Classical Binary Logic: Opportunities in Nano-Scale Integration Age
Author_Institution :
McGill Univ., Montrea, QC
Abstract :
In this paper, we first recap the rationale beyond the (non)-acceptance of multi-valued logic in implementing FPGAs so far, explaining the most critical technological and tool support details. Then, we outline the critical applications of FPGAs (e.g., emulation) where the non-binary nature can be exploited by MVL implementation. Finally, we highlight the most significant opportunities that present themselves with the transition to the nano-scale system implementations.
Keywords :
field programmable gate arrays; integrated circuit design; logic design; multivalued logic; nanoelectronics; FPGA design; classical binary logic; emulation; multivalued logic; nanoscale integration; Application specific integrated circuits; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Logic design; Multivalued logic; Programmable logic arrays; Programmable logic devices; Software maintenance; Software tools; Design tools; Emulation; FPGAs; High Capacity Memories; Multiple-valued logic; Nanotechnology; Verification;
Conference_Titel :
Multiple-Valued Logic, 2009. ISMVL '09. 39th International Symposium on
Conference_Location :
Naha, Okinawa
Print_ISBN :
978-1-4244-3841-9
Electronic_ISBN :
0195-623X
DOI :
10.1109/ISMVL.2009.51
