DocumentCode :
1699125
Title :
Number representations for reducing switched capacitance in subband coding
Author :
Sacha, John R. ; Irwin, Mary Jane
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
Volume :
5
fYear :
1998
Firstpage :
3125
Abstract :
In low power VLSI design, fixed point number representations are standard. For some signal processing applications, however, achieving sufficient dynamic range with fixed point may lead to computations utilizing more precision than necessary. In such cases, trading precision for dynamic range through the use of floating point and logarithmic number system representations can potentially provide power savings. This is demonstrated for a subband speech coding application using architectural-level capacitance modeling
Keywords :
CMOS digital integrated circuits; VLSI; capacitance; digital arithmetic; digital signal processing chips; speech coding; CMOS circuits; QMF filter bank; architectural-level capacitance modeling; dynamic range; fixed point number representations; floating point; logarithmic number system representation; low power VLSI design; reconstruction distortion; signal processing applications; subband speech coding; switched capacitance reduction; Capacitance; Circuits; Dynamic range; Fixed-point arithmetic; Power dissipation; Power system modeling; Signal processing; Speech analysis; Speech coding; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on
Conference_Location :
Seattle, WA
ISSN :
1520-6149
Print_ISBN :
0-7803-4428-6
Type :
conf
DOI :
10.1109/ICASSP.1998.678188
Filename :
678188
Link To Document :
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