Author :
Chandra, Vikas ; Andre, Tom
Author_Institution :
ARM, UK
Abstract :
A wide variety of memory topics addressing design trends at advanced technology nodes. Variation tolerant and low power approaches are discussed as well as their application to SRAM, DRAM, Non-volatile memories and DDR5 interfaces.
Keywords :
CMOS process; Calibration; Degradation; Digital control; Impedance; Nonvolatile memory; Random access memory; Signal processing; Testing; Timing;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA, USA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280730