• DocumentCode
    1699201
  • Title

    ABACO architecture: implementation details

  • Author

    Beltrán, Fernando A. ; Navarro, Jesus

  • Author_Institution
    Dept. Ingenieria Electr. e Inf., Zaragoza Univ., Maria de Luna, Spain
  • fYear
    1991
  • Firstpage
    1272
  • Abstract
    The implementation details of an advanced version of the ABACO architecture are presented. ABACO is a distributed memory multiprocessor system with a shared-bus interconnection network. The processing elements (PEs) are based on the Texas Instruments TMS320C25 digital signal processors (DSPs). The architecture presents a modular implementation: up to four modules with four PEs per module. This characteristic allows great flexibility and reconfigurability. The target is a low-cost and high-performance system for industrial artificial vision applications
  • Keywords
    computer vision; digital signal processing chips; distributed processing; multiprocessing systems; ABACO architecture; DSP; TMS320C25 digital signal processors; Texas Instruments; distributed memory multiprocessor system; high-performance system; industrial artificial vision applications; low cost system; modules; processing elements; shared-bus interconnection network; Computer architecture; Costs; Digital signal processing; Digital signal processors; Hardware; Instruments; Multiprocessor interconnection networks; Registers; System buses; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
  • Conference_Location
    LJubljana
  • Print_ISBN
    0-87942-655-1
  • Type

    conf

  • DOI
    10.1109/MELCON.1991.162073
  • Filename
    162073