Title :
A DLL-based programmable clock generator using threshold-trigger delay element and circular edge combiner
Author :
Hong-Yi Huang ; Shen, Jiun-Hong
Author_Institution :
Dept. of Electron. Eng., Fu-Jen Catholic Univ., Taiwan
Abstract :
In this work, a DLL-based CMOS programmable clock generator is presented. A threshold-trigger delay element obtains better duty cycle and jitter performance without dc power consumption. A programmable edge combiner using circular scheme can operate at 0.8V supply voltage. A clock generator programmed by 1, 2, 3 and 6 is design using a 0.18-um 1p6m CMOS process. The input and output frequency ranges of multiply-by-1/2/3/6 clock generator at 1.8V supply voltage are 138 MHz ∼ 277MHz and 138 MHz ∼ 1.6GHz, respectively.
Keywords :
CMOS digital integrated circuits; clocks; delay lock loops; frequency multipliers; low-power electronics; phase detectors; programmable circuits; synchronisation; timing jitter; trigger circuits; 0.8 V; 1.8 V; CMOS programmable clock generator; DLL-based programmable clock generator; accumulation jitter; charge pump; circular edge combiner; duty cycle; frequency multiplication ratio; jitter performance; low-pass filter; phase detector; threshold-trigger delay element; voltage-controlled delay line; Clocks; Delay effects; Delay lines; Frequency; Jitter; MOS capacitors; Programmable circuits; Threshold voltage; Voltage control; Voltage-controlled oscillators;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349410
