Title :
A 0.5V 2.2pW 2-transistor voltage reference
Author :
Seok, Mingoo ; Kim, Gyouho ; Sylvester, Dennis ; Blaauw, David
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
Abstract :
A voltage reference using a depletion-mode device is designed in a 0.13 mum CMOS process and achieves ultra-low power consumption and sub-1V operation without sacrificing temperature and supply voltage insensitivity. Measurements show a temperature coefficient of 19.4 ppm/degC (3.4 muV/degC), line sensitivity of 0.033%/V, power supply rejection ratio of -67 dB, and power consumption of 2.2 pW. It requires only two devices and functions down to Vdd = 0.5 V with an area of 1350 mum2. A variant for higher Vout is also demonstrated.
Keywords :
CMOS integrated circuits; low-power electronics; transistor circuits; CMOS process; depletion-mode device; power 2.2 pW; size 0.13 mum; sub-1V operation; transistor voltage reference; ultra-low power consumption; voltage 0.5 V; CMOS technology; Circuits; Energy consumption; Equations; Power supplies; Subthreshold current; Temperature measurement; Temperature sensors; Variable structure systems; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280773
