Title :
Loopback architecture for wafer-level at-speed testing of embedded HyperTransportTM processor links
Author :
Loke, Alvin L S ; Doyle, Bruce A. ; Oshima, Michael M. ; Williams, Wade L. ; Lewis, Robert G. ; Wang, Charles L. ; Hanpachern, Audie ; Tucker, Karen M. ; Gurunath, Prashanth ; Asada, Gladney C. ; Lackey, Chad O. ; Wee, Tin Tin ; Fang, Emerson S.
Author_Institution :
Adv. Micro Devices, Inc., Fort Collins, CO, USA
Abstract :
We present transceiver serial loopback that enables cost-effective wafer-level at-speed testing of HyperTransporttrade (HT) I/O for processor die-to-die communication. Besides facilitating known-good-die testing, this feature provides observability of multi-chip module (MCM) die-to-die links that are completely embedded without external pin visibility. We demonstrate production screening of 45-nm SOI-CMOS wafers at 6.4 Gb/s.
Keywords :
embedded systems; microprocessor chips; multichip modules; wafer level packaging; embedded HyperTransport processor links; known-good-die testing; multichip module die-to-die links; processor die-to-die communication; transceiver serial loopback; wafer-level at-speed testing; Circuit testing; Clocks; Niobium; Observability; Packaging; Production; Tin; Transceivers; USA Councils; Wafer scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-4071-9
Electronic_ISBN :
978-1-4244-4073-3
DOI :
10.1109/CICC.2009.5280778
