• DocumentCode
    1700640
  • Title

    The structural testing of switched current designs

  • Author

    Wrighton, P.L. ; Taylor, G.E. ; Toumazou, C.

  • Author_Institution
    Dept. of Electron., Hull Univ., UK
  • fYear
    1993
  • fDate
    12/13/1993 12:00:00 AM
  • Firstpage
    42583
  • Lastpage
    42589
  • Abstract
    The switched current memory cell is a conceptually simple yet elegant building block which can be used to realise many analogue applications including: filters, data convertors and neural networks. The advantages of using switched current design over the more conventional switched capacitor realisations are numerous, more importantly, compatibility with digital circuit supply voltages. Furthermore the functionality of a switched current circuit offers the ability to incorporate a particularly simple design for test techniques, which reduces the test of the bulk of the circuit to comparison between identical sub-circuits. Early work concentrated on detecting catastrophic or hard faults on the component transistors. More recently this has been extended by simulating a variety of connectivity and soft faults including: bridging defects, floating gate faults, gate oxide faults and aspect ratio deviations. By taking layout based information into account an exponential information increase can be avoided as more fault types are introduced
  • Keywords
    data conversion; fault location; filters; linear integrated circuits; neural nets; switched networks; analogue applications; aspect ratio deviations; bridging defects; connectivity; data convertors; digital circuit supply voltages; fault types; filters; floating gate faults; gate oxide faults; identical sub-circuits; memory cell; neural networks; switched current designs;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Mixed Signal VLSI Test, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    280211