Title :
Testability structure for mixed-signal boards
Author :
Wilkins, B.R. ; Suparjo, B.S.
Author_Institution :
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
fDate :
12/13/1993 12:00:00 AM
Abstract :
A testability structure that provides facilities for the application of interconnect test on mixed-signal boards is at present under development by a Standardisation Working Group. This structure includes two analogue busses within the chip, which could be supplied externally through dedicated pins. The present paper describes a method of providing the same functions but without the pin overhead. Results obtained from prototype implementations are described
Keywords :
design for testability; integrated circuit testing; mixed analogue-digital integrated circuits; printed circuit testing; analogue busses; dedicated pins; interconnect test; mixed-signal boards; pin overhead; prototype implementations; testability structure;
Conference_Titel :
Mixed Signal VLSI Test, IEE Colloquium on
Conference_Location :
London
