DocumentCode
1701338
Title
Maximally fast, bit-serial lattice wave digital filters
Author
Vesterbacka, Mark ; Palmkvist, Kent ; Wanhammar, Lars
Author_Institution
Dept. of Electr. Eng., Linkoping Univ., Sweden
fYear
1996
Firstpage
207
Lastpage
210
Abstract
An approach to schedule lattice wave digital filters so that the maximal sample frequency is obtained is presented. In the approach, bit-serial arithmetic and a scheduling method that decouples the sample period from the scheduling period are used. A lower bound on the scheduling period required to arrive at the minimum sample period is given. Different latency models for the arithmetic operations, and their effect on the minimum sample period are discussed. The operation schedule is mapped to a hardware structure using isomorphic mapping. The throughput of the resulting implementations is comparable to corresponding bit-parallel implementations
Keywords
all-pass filters; digital arithmetic; lattice filters; recursive filters; wave digital filters; bit-serial arithmetic; hardware structure; isomorphic mapping; latency models; lattice wave digital filters; lower bound; maximal sample frequency; maximally fast implementation; minimum sample period; operation schedule; scheduling period; throughput; CMOS logic circuits; CMOS process; Clocks; Delay; Digital filters; Flip-flops; Lattices; Pipeline processing; Semiconductor device modeling; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Signal Processing Workshop Proceedings, 1996., IEEE
Conference_Location
Loen
Print_ISBN
0-7803-3629-1
Type
conf
DOI
10.1109/DSPWS.1996.555497
Filename
555497
Link To Document