DocumentCode
170157
Title
Reconfigurable high performance architectures: How much are they ready for safety-critical applications?
Author
Sabena, D. ; Sterpone, L. ; Scholzel, Mario ; Koal, Tobias ; Vierhaus, Heinrich T. ; Wong, Simon ; Glein, Robert ; Rittner, Florian ; Stender, Christopher ; Porrmann, Mario ; Hagemeyer, Jens
Author_Institution
Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
fYear
2014
fDate
26-30 May 2014
Firstpage
1
Lastpage
8
Abstract
Reconfigurable architectures are increasingly employed in a large range of embedded applications, mainly due to their ability to provide high performance and high flexibility, combined with the possibility to be tuned according to the specific task they address. Reconfigurable systems are today used in several application areas, and are also suitable for systems employed in safety-critical environments. The actual development trend in this area is focused on the usage of the reconfigurable features to improve the fault tolerance and the self-test and the self-repair capabilities of the considered systems. The state-of-the-art of the reconfigurable systems is today represented by Very Long Instruction Word (VLIW) processors and reconfigurable systems based on partially reconfigurable SRAM-based FPGAs. In this paper, we present an overview and accurate analysis of these two type of reconfigurable systems. The content of the paper is focused on analyzing design features, fail-safe and reconfigurable features oriented to self-adaptive mitigation and redundancy approaches applied during the design phase. Experimental results reporting a clear status of the test data and fault tolerance robustness are detailed and commented.
Keywords
SRAM chips; fault tolerance; field programmable gate arrays; instruction sets; integrated circuit design; logic design; microprocessor chips; reconfigurable architectures; redundancy; VLIW processors; design phase; embedded applications; fail-safe; fault tolerance robustness; partially reconfigurable SRAM-based FPGA; reconfigurable features usage; reconfigurable high performance architectures; reconfigurable systems; redundancy approaches; safety-critical applications; safety-critical environments; self-adaptive mitigation; self-repair capabilities; self-test capabilities; test data; very long instruction word processors; Fault tolerant systems; Field programmable gate arrays; Hardware; Program processors; Random access memory; System-on-chip; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2014 19th IEEE European
Conference_Location
Paderborn
Type
conf
DOI
10.1109/ETS.2014.6847820
Filename
6847820
Link To Document