DocumentCode :
170162
Title :
Using dynamic shift to reduce test data volume in high-compression designs
Author :
Xijiang Lin ; Kassab, M. ; Rajski, J.
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
fYear :
2014
fDate :
26-30 May 2014
Firstpage :
1
Lastpage :
6
Abstract :
This paper presents a test data volume (TDV) reduction method for designs utilizing extremely high compression configurations, and it enables reducing the pin count interfacing with the Automatic Test Equipment. Based on the encoding requirements for every test cube, the proposed test compression method changes the number of shift cycles used to load the test stimuli dynamically. No additional pins or modification of the existing scan chains is needed, making the proposed method work seamlessly with existing sequential linear decompressors. Experimental results obtained for industrial designs demonstrate the effectiveness of the proposed method at reducing TDV in high compression configurations.
Keywords :
automatic test equipment; data compression; integrated circuit design; logic design; logic testing; TDV reduction method; automatic test equipment; dynamic shift; encoding requirements; high-compression designs; scan chains; sequential linear decompressors; test compression method; test cube; test data volume reduction method; Clocks; Compaction; Encoding; Logic gates; Registers; System-on-chip; Test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2014 19th IEEE European
Conference_Location :
Paderborn
Type :
conf
DOI :
10.1109/ETS.2014.6847822
Filename :
6847822
Link To Document :
بازگشت