DocumentCode
170171
Title
Property-checking based LBIST for improved diagnosability
Author
Prabhu, Shashank ; Acharya, Vineeth V. ; Bagri, Sharad ; Hsiao, Michael S.
Author_Institution
Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear
2014
fDate
26-30 May 2014
Firstpage
1
Lastpage
2
Abstract
We propose a new property-checking-based LBIST architecture which uses hardware monitors to check certain properties in the output responses. If any property is violated, the failing property number is stored for diagnosis. The proposed architecture improves diagnosability considerably with minimal hardware overhead. Experimental results show that the diagnostic resolution achieved by our architecture is comparable to that achieved in a non-BIST setup for many circuits.
Keywords
built-in self test; integrated logic circuits; logic testing; LBIST architecture; diagnosability; diagnostic resolution; failing property number; hardware monitors; logic built-in-self-test; minimal hardware overhead; property checking; Built-in self-test; Circuit faults; Computer architecture; Fault detection; Hardware; Monitoring; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2014 19th IEEE European
Conference_Location
Paderborn
Type
conf
DOI
10.1109/ETS.2014.6847828
Filename
6847828
Link To Document